1. Field of the Invention
The present invention relates to a semiconductor device with crystalline layer formed by utilizing selective nucleation method for selectively growing crystal using a difference in nucleation density of the deposited film forming materials according to the kinds of the deposited surface constituting materials.
2. Related Background Art
Since an integrated circuit device comprising an integrated circuit produced by forming a single crystal silicon on an insulating material substrate has small parasitic capacitance, it can operate in higher speed then the integrated circuit formed on a silicon substrate. Further, when a complementary MOS (C-MOS) integrated circuit is produced by the single crystalline silicon formed on the insulating material substrate, since no thyristor is formed by a parasitic bipolar transistor, there is no possibility of causing a latch up effect.
As the insulating material substrate for use in such integrated circuit device, a sapphire substrate has been used conventionally.
However, the sapphire substrate is more expensive than the silicon substrate. The sapphire substrate is applicable for only a limited use.
Further, in recent years, a method has been provided for forming a single crystalline film by covering the silicon substrate with insulating material, forming polycrystalline silicon film on the insulating material, and melting and recrystallizing the polycrystalline silicon with laser beam, and method for obtaining structure wherein the single crystalline silicon layer is on the insulating layer by implanting oxygen ion into the silicon substrate to form the insulating layer in the silicon substrate.
However, all of these methods require a process of very low producing efficiency such as process for melting the polycrystalline silicon with a laser beam and a process of a high dose of ion implantation with an ion implantation apparatus. Accordingly, there are problems that reducing the cost of the integrated circuit device is difficult and that, since it is difficult to get a high quality single crystalline silicon, a high performance integrated circuit can not be produced. While, in recent years, research and development of three dimensional integrated circuit, wherein semiconductor elements are formed in a configuration of layers stacked on the substrate is a direction normal to the substrate thereby high integration density and multifunction are achieved, are executed.
In order to achieve the three dimensional integrated circuit, it is necessary to form the semiconductor thin film for producing the electronic elements such as transistors on amorphous insulating material. However, in general, on the amorphous material, only amorphous silicon or polycrystalline silicon can be grown.
Therefore, in the prior art methods are classified as method wherein the amorphous or polycrystalline silicon is directly used as the semiconductor layers for producing the electronic elements, or method wherein the grown amorphous or polycrystalline silicon is method with laser beam or the like to be crystallized as a single crystal and the crystallized single crystal is used as the semiconductor layers of the electronic element.
However, when the amorphous or polycrystalline silicon is directly used as a semiconductor layer for producing the electronic elements, there are problems that the electron mobilities obtained is small (approximately .about.0.1 cm.sup.2 /V.sec for amorphous; approximately 1.about.10 cm.sup.2 /V.sec for polycrystalline silicon with particle size of few hundreds of angstroms), and that leakage current is large even if a PN junction is formed. Accordingly, high performance electronic elements can not be produced.
While, according to the method wherein the grown amorphous or polycrystalline silicon is melted and re-crystallized, since the single crystal layer is used as the semiconductor layer for producing the electronic elements, high performance electronic elements can be obtained. However, since the silicon layer is heated by the laser beam to be melted, there is a problem that the heating adversely affects the performance of the elements formed under the silicon layer.